logisim-evolution version history

- Increased component display options and fixed synchronization bugs. - Enhanced TestVector, Video resolution, and Undo/Redo functionality. - Improved Counter component and image exports. - Added DMA copy engine component and enhanced localization.

* v4.0.0 (2025-09-07) * Updated VHDL and created Verilog generator for RAM component with byte-enables * Added VHDL and Verilog for the RAM component with line-enables * fixed clasic appearance shift-register bug * Added automatic custom Logisim library loading at startup. * Created unit tests for loading custom Logisim libraries at startup. * Updated documentation for the automatic loading of custom Logisim libraries. * New take on project export/import. A zip-file is generated which can include a user provided "README.md". * Added Telnet component. * Added Metal graphics acceleration option. * Added option to hide/show toolbar * Improved drawing appearance. * Fixed TTY appearance bug while changing various zoom levels. * Corrected appearance of NOT gates in TikZ/SVG image export. * Corrected disjoint corners in arrow-style Pins. * Improved output of rectangles with rounded corners in TikZ image export. * Fixed Undo/Redo issues. * Fixed Power-on-Reset propagation issue. * Redesigned simulation engine to fix synchronization issues and increase speed. * Fixed synchronization and efficiency issues in wires and pro

* Updated Java requirement to Java 21. * Added an autosave feature along with preferences for it. * Added a new preference to allow the user to choose the action keys for many functions. * Changed RAM default output from error to undefined [#1747] * Added support for scanning 7-segment display on FPGA-boards * Added first support for the openFpga toolchain for the ecp5 famely Note that this is experimental for the moment, so use it at your own risk. * Improved Chinese localization * Changed language code from `cn` to `zh`. * Chinese users (also including those who use other forks of Logisim that are using `cn` language code) will be required to manually modify language settings. * Fixed select port positioning on Multiplexer to be more consistent in some cases [#1734] * Fixed appearance of LSe desktop icon [#1662] * Update controlled buffer behavior to pass U and E inputs while enabled [#1642] * Introduced user-defined color for components. * Made component icons more uniform. * Added architecture designation to macOS build. * Fixed Karnaugh map color index bug. * Attribute sheet now honors application color theme.

Mainly a bug-fix release: * Added reset value attribute to input pins * Fixed boolean algebra minimal form bug * Fixed random fill Rom bug * Added TTL 74164, 74192 and 74193. * Fixed off grid components bug that could lead to OutOfMemory error. * Removed autolabler for tunnels, such that all get the same label in case of renaming. * Fixed bug preventing TTL 7442, 7443 and 7444 from being placed on the circuit canvas. * Sub-circuit can now be deleted with `DELETE` key, along with `BACKSPACE` used so far. * Fixed `Simulate` -> `Timing Diagram` not opening when using "Nimbus" look and feel. * Fixed pressing `CTRL`+`0` selecting the wrong element in the toolbar. * Fixed TTL 7485 `7485HdlGenerator` generating wrong HDL type. * Fixed TTL 74139, 7447 outputting inverted logic * Fixed TTL 74175, CLR inverted * Fixed TTL 7436 pin arrangement * Added TTL 74138: 3-line to 8-line decoder * Added TTL 74240, 74241, 74244: octal buffers with three-state outputs. * Added TTL 74245: octal bus transceivers with three-state outputs. * Moved TTL 74266 to 747266, correctly reimplemented 74266 with open-collector outputs. * Fixed TTL 74165, correc

* Fixed Preferences/Window "Reset window layout to defaults" not doing much. * Fixed Gradle builder failing to compile LSe if sources were not checked out from Git. * You can now swap the placement of main canvas and component tree/properties pane. * Added Chinese translation. * Several bug fixes.

* Logisim has now an internal font-chooser to comply to the font-values used * Several bug fixes

* Reworked the slider component in the I/O extra library * Tick clock frequency display moved to left corner. It's also bigger and text color is configurable. * Completely rewritten command line argument parser: * All options have both short and long version now, * All long arguments require `--` prefix i.e. `--version`, * All short arguments require single `-` as prefix i.e. `-v`, * `-clearprefs` is now `--clear-prefs`, * `-clearprops` option is removed (use `--clear-prefs` instead), * `-geom` is now `--geometry`, * `-nosplash` is now `--no-splash` or `-ns, * `-sub` is now `--substitute` or `-s`, * `-testvector` is now `--test-vector` or `-w`, * `-test-fpga-implementation` is now `--test-fpga` or `-f`, * `-questa` is removed. * PortIO HDL generator and component bug-fixed * Cleanup/rework of the HDL-generation * Each circuit stores/restores the last board used for Download (handy for templates to give to students) * Fixed startup crash related to incorrectly localized date format. * Added a setting to select lower- or upper-case VHDL keywords. * Added project export feature (experimental). * Cleane

This release contains a bug fix for the GECKO4Education(-EPFL edition) boards that use the LED-array.

Changes to the previous release: * Introducing new project logo. * Fixed project loader to correctly handle hex values with a 1 in bit 63rd. * Added TTL74x34 hex buffer gate. * Made pins' tooltips more descriptive for 74161. * Added new component LED Bar. * Added 74157 and 74158: Quad 2-line to1-line selectors. * Added option to configure canvas' and grid's colors. * Added DIP switch state visual feedback for ON state. * Augmented direction verbal labels (East, North, etc), with corresponding arrow symbols. * Application title string now adds app name/version at the very end of the title. * Added option to configure size of connection pin markers. * Added TTL 74x139: dual 2-line to 4-lines decoders. * Fixed missing port on DotMatrix. * Combined `Select Location` from Plexers and `Gate Location` from Wiring to one attribute. * Breaks backwards comparability for Transistors and Transmission Gates. When opening old .circ files, they will have the default `Select Location` ("Bottom/Left"). * Replace DarkLaf with FlatLaf for better compatibility. * Adds "Rotate Left" context menu action. * Display "Too few inputs for table

This version has many code-cleanups, bug fixes and again the chronogram.