Ripes version history
10 releases tracked, newest first.
continuous
Pre-releaseMay 27, 2026- Changed `-executable` test to `-exec` action in `find` command for improved functionality.
3 downloads
v2.2.6
Jan 7, 2023## Ripes v2.2.6
### Bug fixes and minor stuff
* Fixed crash when changing processor layout due to incorrect processor label IDs.
* Changed the terminology for caches, substituting "Word" for "Block". Most textbooks use the term "cache block" interchangeably with "cache line", so using "Block" for words stored in a cache line was confusing.
3 downloads
v2.2.5
Aug 28, 2022## Ripes v2.2.5
### New Features:
- Ripes command line mode
- Ripes can now be executed without the GUI to support batch and headless execution, as well as to integrate into other flows.
- An example run is: `./Ripes --mode sh --src complexMul.s -t asm --proc "RV32_6S_DUAL" --isaexts M,C --cpi --cycles --pipeline`
- See `./Ripes --help` for the full list of supported telemetry and options.
### Bug fixes and minor stuff
- Added new example for reading from STDIN in assembly
- Fixed deadlock when resetting processor while waiting for user input
- Fixed zombie state when exiting the application while "running" the processor
- Fixed string literal tokenizer; '\\"' and ':' are now allowed inside string directives.
- Added register column to system call help window.
- Added support for local/relative labels in assembler.
- Fixed pipeline diagram not updating
3 downloads
v2.2.4
Jan 30, 2022## Ripes V2.2.4
### New features:
- Support for the RISC-V compressed instruction set for all processors (big thanks to @lcgamboa for taking care of the processor model implementation!).
- Support for clang-format'ting `.c` files
- Added source code stage highlighting. Enabled for C code when programs are compiled with `-g`.
**Note**: If you've used Ripes prior to this version, you must manually add `-g` to "compiler arguments in `settings->compiler->compiler arguments`. For new users, `-g` will be added by default.
### Bug fixes:
- Fixed race condition when autoclocking the single cycle processor which allowed for executing instructions beyond an `ecall exit` instruction
- Fixed issue in verifying ELF flags, which could sometimes lead to compiler autodetection failing
- Fixed issue in reloading integer settings values which represented unsigned integers
- A bunch of small fixes to issues relating to persisting save file path information.
- Fixed issue in loading flat binary files containing `0x0D` (CR) characters.
- Fix issue where parent directories were not being created when saving files.
3 downloads
v2.2.3
Sep 12, 2021## Ripes V2.2.3
### Bug fixes:
- Memory viewer showing incorrect values for 64-bit processors
- Fix some 32-bit hardcoding in cache sim and cache viz
- ProcessorHandler futurewatcher signals were reconnected on each invocation of `run`, essentially creating a linear increase in execution time after each `run` invokation which slowed down the application over time.
3 downloads
v2.2.2
Jul 29, 2021## Ripes v2.2.2
### New features/changes:
- 64 bit support (RV64IM) for all current processors. This implies support for RV64IM instructions in the built-in assembler as well as compiler support for RV64 compatible baremetal toolchains
- Added a register view in the edit tab (may be disabled in settings)
- The current processor and ISA are now shown in the status bar
- Added `%hi` and `%lo` relocations
- Cache plot marker values are now shown in cache legend
- Various quality of life changes in the editor (indentation, parenthesis completion, ...)
### Bug fixes:
- Stage information was not always being update in the program viewer (only an issue with the 6 stage model).
- The symbol navigator was using incorrect symbol addresses. This was only a real issue on large, compiled programs.
- Fixed layering issues with port value labels
- Fix crashes on startup and shutdown on macOS
- Fixed cache graphic not updating after run finished
- Fixed possible crash when changing cache preset during stepping the processor
3 downloads
v2.2.1
Jun 15, 2021## Ripes v2.2.1
Fixes some critical bugs present in v2.2.0.
- Fix assembler error on parenthesis inside string directives #91
- Immediate values inside string directives were being highlighted separately, and not as part of the string
- Fix possible overwrite of previously saved program when loading a new example
- Fix possible invalid iterator dereference in ProgramViewer
- Fix (in some cases?)/improve compiler execution on Windows and elaborate compiler error message
- Change default compiler argument from `static-libgcc` to `-static`
3 downloads
v2.2.0
May 28, 2021## Ripes v2.2.0
### New features
- Complete rework of the assembler/disassembler infrastructure:
- Instructions taking immediate values now support simple expression evaluation. Furthermore, any label may be used as an immediate value.
- New infrastructure significantly simplifies adding new ISAs and ISA extensions.
- Added `.equ` directive, for defining constants in the assembler
- ISA extensions can now be toggled for a given processor. ISA extension changes are reflected in the assembler, syntax highlighter, and C compiler `--march` strings.
- A 6-stage dual-issue processor model is now available. This is the first processor model in Ripes capable of reaching an IPC > 1.
- A 5-stage with hazard detection but no forwarding is now available.
- Various toolbuttons have been moved to clean up the UI.
- Various performance improvements to remove unnecessary model and UI updates.
- Modified cache simulator:
- The cache simulator now has a dedicated tab.
- The cache view now visualizes how the block and line indices map into the cache.
- It is possible to save and load user cache presets
- More focus on cache statistics, which includes real-time plotting
3 downloads
v2.1.0
Jul 20, 2020## Ripes v2.1.0
### New features
- **Cache simulation**
- As of version 2.1.0, Ripes includes cache simulation. The cache simulator simulates L1D (data) and L1I (instruction) caches, wherein it is possible to configure the geometry and behavior of each cache type. Similarly to all of the included processor models, it is possible to rewind (undo a clock cycle) the state of the cache simulator to investigate any situation of interest.
- Refer to [this wiki page](https://github.com/mortbopet/Ripes/wiki/Cache-Simulation) for more info on how to use the cache simulator.
- **Compiler integration**
- It is now possible to write and execute C-language programs right within Ripes. To do so, a compatible compiler must be downloaded and registered with the program. After this, C programs may be written and simulated, with support for most of the C standard library.
- Refer to [this wiki page](https://github.com/mortbopet/Ripes/wiki/Building-and-Executing-C-programs-with-Ripes) for more info on how to build and execute C language programs within Ripes.
- A new **symbol navigator** window has been added to the edit tab. Pressing the compass icon in the toolbar of the edit tab
3 downloads
v2.0.1
Mar 5, 2020### New features
- Disassemble view has been reworked to align with a typical `objdump` output, showing labels, instruction addresses etc.
- Disassembly view now highlights the currently executing instructions for each stage
### Bug fixes
- Fix misaligned PC4 output ports for MEMWB registers in extended layouts for RV5S and RV5S_NO_HZ
- Fix possible crash when using load dialog after having loaded an ELF file
- Target address when disassembling `jal` instructions of a program loaded at a non-zero start address was miscalculated.
#### VSRTL:
- Tooltips are no longer shown when hovering over a hidden wire
- Hovering over a port value label will display the tooltip of the associated port
3 downloads